Email resumes to laxman.kapardhi@calsoftlabs.com
Available Positions: 1
Posting Title: WLAN HW bringup
Location: California - San Jose
Engineer - Engineer IV
Skills / Experience:
- 7 years of relevant experience in the bringup of wireless communications PHYs and SoCs - Familiarity with 802.11 WLAN - Familiarity with digital design principles, ability to trace HDL code - Good working knowledge of C and embedded programming - Good working knowledge of scripting (Perl, Python) - Excellent debug skills - Good communications skills
Job Description:
Lab bringup of an advanced WLAN PHY
Responsibilities:
- Use FW, diagnostic and self developed tools to bringup a new WLAN PHY design - Independently verify block level performance - Validate the HW using diagnostic and mission-mode FW - Handle both block and system-level debug of WLAN PHY
Education: Required: Bachelor's, Electrical Engineering or equivalent experience Preferred: Master's, Electrical Engineering or equivalent experience
Location: San Diego, CA
Engineer III
| Field |
| New Value |
| Job Function |
| 5+ years experience in verification, test planning, problem solving, debug, adversarial testing. Strong working knowledge of HVLs: System Verilog, VERA/e-Specman, System C. Experience with methodologies like OVM and UVM is required. RTL design experience and/or very strong OO programming experience is required Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting knowledge required. Experience with Power aware simulations, GLS is preferred. AHB/AXI/ARM protocols working knowledge preferred. Experience with simulation acceleration tool like Veloce/Palladium is a plus. |
RF Product & Test Engineer (Fresh Graduates on OPT OK)
San Diego, CA
Engineer 1
| Field |
| New Value |
| Supplier Comments # |
| Manager would like to see candidates with the following background: Expert in scripting with Perl and Python with hands on experience and not just coursework. JD 8/19/2014 Please send new resumes. Manager needs to fill some additional openings. Manager has requested more resumes with RF background. Please submit candidates who are able to start within a few weeks. The manager for this req would like to review new candidates |
IC Product and Test Development Engineer
Location: California - San Diego
Job Family Title: Engineer - Temporary - Engineer III
Skills / Experience: Experience in the following areas required: 5-10 years working on ATE (93K is a plus) Understanding of VLSI technologies Familiarity with digital communication concepts Ability to work with common test equipment (oscilloscope, spectrum analyzer, time interval analyzer, logic analyzer, network analyzer, etc) Experience with ATE test platforms Additional skills in the following areas are a plus: Familiarity with Advantest 93K SOC test system Familiarity with CMOS Analog, and Mixed Signal circuits such as ADC, DAC, PLL, Codecs and their performance measurements Familiarity with high-speed interfaces such as HDMI, PCI Express, SATA, USB Familiarity with design for test (DFT) techniques and structural tests such as Scan/ATPG, JTAG, and memory BIST Experience with C/C++, Perl, Java Managing a team of engineers in a production environment Familiarity with bring-up, characterization & time to market for ICs Proven record
Education: Bachelor's degree in Electrical Engineering or equivalent required. Master's degree in Electrical Engineering or equivalent preferred. *LI-SRC
Comments: Candidates so far have not been strong enough with their test engineering skills. Manager has requested more resumes with the following qualifications: - ATE experience on either digital, ATPG, memory, microprocessor or baseband circuits. - 93k or UFLEX experience - > 5 years of experience JD Manager really needs more resumes ASAP. The manager has 3 openings for this type of a role. Please submit additional resumes
Available Positions: 1
Posting Title: Linux Software Engineer - Camera and Imaging Processing
Location: California - San Diego
Engineer I
Responsibilities: Proficient in C/C++ and Java programming with strong industry embedded software and firmware development experience. Solid background of computer architecture, embedded RTOS operating systems, real-time hardware drives. Experience of embedded Linux operating system and POSIX standard development. Experience with Android media framework and OpenGLES are strongly preferred. Experienced in various image processing algorithms in digital camera industry, such as color enhancement, noise reduction, CMOS/CDP camera sensor technologies etc. Ability to develop and debug embedded software and firmware spanning multiple processor cores and subsystems in real-time multitasking, multithreaded environments, including reading schematics, debugging hardware, and proficiency with logic analyzers, oscilloscopes, JTAGs, and other lab and test equipment. Experience with generally accepted software design pattern programming and release practices Excellent interpersonal skills with the ability to learn quickly and work independently within a multi-disciplinary, dynamic, and fast paced organization building next generation smart mobile devices.
Education: BS in CS, CE or EE required
Comments: ** need candidates that can start within 2 weeks of offer** • Knowledge of camera sensor driver development and commercialization on Linux platform is big plus • Knowledge of android camera framework software and android camera HAL are big plus
Available Positions: 3
Posting Title: Hot Req - Design Automation R&D Engineer
Engineer IV
Skills / Experience: - Good Knowledge in developing Web based Applications using Javascript, PHP, REST APIs, HTML, XML, JSON, JAVA etc - Strong knowledge in object-oriented programming such as Java, C/C++, OO Perl, etc. - Working experience with databases like MySQL, Oracle, Hibernate , JDBC - Strong knowledge in .NET framework ,C# and Visual Studio
Responsibilities: - Develop Web based Applications and Excel Plugin
Education: Degree required. BS with additional 10+ years industry experience or MS/Ph.D. with 5+ years of experience in the field of Computer Engineering, Computer Science or Electrical Engineering required.
Comments: Manager has requested new resumes reflecting the changes in the Responsibilities, Skills/Experience, and Keywords section. Please submit additional candidates with the following qualifications: - Strong knowledge in MS Excel Plugin development, Visual Basic and macro development - Strong knowledge in .net framework, C# and visual studio
Available Positions: 2
Posting Title: Linux Automotive Engineer
Location: California - San Diego
Engineer II
Skills / Experience: - Proven ability and interest in debugging complex embedded software systems. - Strong background in Computer Science and fundamentals of debugging embedded software. - Good working knowledge of C, C++ and Java. - Strong ability to solve problems in a non-linear fashion. - Prior experience with Android and/or Qualcomm MSM software platforms is a plus. - Technical understanding of Wireless Applications and Network Interactions with Handsets e.g., browser, messaging, email, app downloads, etc. is highly desired. - Proven ability to develop and debug Android applications is highly desired. - Experience with git and build systems (like Android, Portage, etc) is highly desired. - Excellent written and verbal communication skills are required - Mature interpersonal skills with an ability to collaboratively work with many varied teams and resolve problems spanning many disciplines - Proven ability to work in a dynamic, multi-tasked environment
Education: Required: Bachelor's, Computer Engineering and/or Computer Science Preferred: Master's, Computer Engineering and/or Computer Science
Comments: Need resumes. Candidates that can start within 2 weeks of offer
Available Positions: 1
Hot Req - Physical Design Advanced Technology Engineer
San Diego
Engineer III
Skills / Experience:
Education: Bachelors electrical engineering with experience in Physical design, Calibre DRC and good understanding of design rules from foundry.
Comments: Manager Feedback: 6-10 years of experience candidates with fundamentals of Physical Design AND eager to learn and broaden skills in area of: - Automation : PD productivity enhancement. Scripting skills in Tcl, PERL, Python OR - Technology : build understanding of Silicon process, DFM and apply to PnR using SNPS and Mentor tools OR - Sign-off tools : STA, Redhawk, STAR-RC – build understanding of how in 20nm and below sign-off flows are changing The role is generic and the manager is willing to invest time and train motivated engineers, but they need to have Physical Design basics and know at least one place and route tool – ICC or Olympus. Please send more resumes based off of this feedback.
Available Positions: 1
Posting Title: SW development/support Engineer - NJ
Work Location: New Jersey - Bridgewater
Skills / Experience: Candidates should have strong experience in s/w development/support with wireless and embedded processor platforms. Hands on experience with development of communication protocol stacks (e.g. TCP/IP, LTE, 3G, WiFi) is a must. Solid knowledge of communication systems architecture, and system performance optimizations Deep system understanding of cellular networks capabilities to analyze a scenario from all system aspects, ability to operate test equipment, such as Signal Generator, VSA, UE emulator At least 5 yrs experience with real time embedded systems and RTOS or Linux, proficiency in C/C++, multi-core system SW development is a plus. Prior participation in full product development cycle, knowledge of semiconductor product enablement Excellent self-learning and problem solving skills with high investigation spirit Strong written and oral communication and teamwork skills are required. Project management exp. is a plus. Critical to have customer oriented business sense. Proficiency in English is a must. Willingness to travel.
Responsibilities: The candidate will work with Customers externally and multiple functional teams internally to drive the productization of our small cell solutions: Customer issue understanding, duplication and debugging Support MKT for new product launch and customer enablement Be product expert for customers to provide product knowledge and solutions On-Site support customer platform design for system bring-up and performance. Write the technical application notes and carry out external releases Host technical trainings for internal FAE and external customers.
Education: Required: Bachelor's, Computer Engineering and/or Electrical Engineering
Comments: *NEED MORE RESUMES*
Available Positions: 1
Posting Title: Software Engineer - Linux Android
Location: California - San Diego
Engineer - Temporary - Engineer I
Skills / Experience: Familiarity with Linux test tools and benchmarks. Excellent communication and organizational skills. Skills: Strong understanding of the software development process Experience in PERL/C/C++/JAVA is a MUST Logical problem solving skills Experience in test automation development is preferred Experience with any of the Qualcomm supported air interfaces IS-2000, GSM/GPRS, UMTS and/or Linux kernel, Google Android and Linux service layer middleware is preferred but not necessary.
Job Description: Must have software (PERL/embedded C/C++) and test automation development skills The Linux Platform Test group designs, develops, debugs and runs test automation software to verify Linux Android based mobile solutions and a broad array of multimedia technologies (audio, video, camera). Flexibility in work assignments and thoroughness in project management are crucial. Responsibilities: Test automation development for the test regime under execution. Continual support of automation framework development and enhancement based on new features added.
Comments: Per mgr I am not able to find good computer science graduates in candidate's pool in the system. • Computer science background with programming/Embedded experience ( academic or work) • Good programming background in C/C++, Java and Perl . • Programming background in Android application is a plus I am not able to find good computer science graduates in candidate's pool in the system.
Available Positions: 1
Posting Title: Hot Req - Physical Design for Parallel PHYs (DDR & USB)
Work Location: California - San Diego
Skills / Experience: The skills and experience required for this position are as follows: Experience and knowledge of tools for physical design implementation (Floorplanning, CTS, P&R, STA) for DDR and USB PHYs in advanced technologies like 20nm & finfet. STA tool and timing closure methodologies Developing and implementing timing ECOs including affect on congestion/routing/power Power grid, clock tree, and low-power reduction implementation methods Signal integrity and timing closure issues such as OCV/AOCV/Statistical Timing Floorplanning, Placement, CTS, P&R Physical Verification, Conformal Low Power (CLP), IR drop analysis, Formal Verification Programming and scripting skills (Tcl, perl and/or C) Strong verbal and written communication skills
Job Description: You will be part of a team responsible for the complete Physical Design Flow for DDR & USB PHYs. Tasks involved can be one or more of the following: Work with the RTL design team on understanding design in context of physical design timing closure including development of timing constraints required for implementation. Work with the DFT team on understanding DFT design in regards to physical design timing closure. Lead core and Top level timing closure activities. Develop new scripts/flows to improve the timing closure process. Complete Physical Implementation of cores i.e. graphics, video, multimedia, processor, DDR. Low-power implementation methods. Core and Top level Floorplanning, placement, CTS, P&R, PV, and Signal Integrity Analysis. Develop high speed customized logic cells.
Responsibilities:
Education: Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering
Comments: Manager has requested additional resumes. Manager would like to see more PD-focused resumes. Urgent req. Please submit additional resumes ASAP. Manager needs candidates with the availability to start in San Diego within 2 weeks
Available Positions: 1
Posting Title: Hot Req - Digital Verification Engineer(s) for Mixed-Signal Products
Work Location: California - San Diego
Skills / Experience:
Job Description: Successful applicants will be responsible for participating in, or leading, the verification of state-of-the-art ASICs in advanced digital deep sub-micron CMOS processes for multi-function mobile platforms. Responsibilities will include all, or some, of the following: 1.Verification of chip level functionality (mainly connectivity, programmability, power up/down, mode control, reset). 2. Negotiating and executing functional verification plans. 3. Writing/debugging/maintaining behavioral models, monitors, and self-checking testbenches. 4. Logging bugs and tracking verification results. 5. Delivering status reports and verification reviews. 6. Generating and maintaining verification schedules.
Responsibilities: Applicants should have a minimum of 2-3 years of digital verification experience including all, or some, of the following: 1. Detailed knowledge of self-checking testbench architectures (including directed and random-constrained generation) and coverage-driven verification techniques at the functional, assertion and code levels. 2. Working knowledge of Object-Oriented SystemVerilog principles including experience with VMM, OVM, or UVM.
Education: Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering
Comments: Please only submit candidates who are available within 1 month. Candidates need to have at least 2 years of OVM or UVM experience, at least 4 years of verification experience, and those available to start within a month (e.g. work-authorization, availability).
Available Positions: 1
Posting Title: Hot Req - Digital Design Engineer(s) for Mixed-Signal ASICs
Work Location: California - San Diego
Engineer III
Job Description: If you are interested in a digital design position focused on the design of digital logic and related digital content for RF, Analog and mixed-signal ASICs the please apply here. These design positions provide digital logic support to QMCs mobile platforms including Radio Frequency (RFIC), Power Management (PMIC) and Baseband audio CODEC devices. Responsibilities: Design of state-of-the-art digital CMOS logic to control the functionality of a variety of RF, analog and mixed-signal circuits such as RF front-ends, Audio CODECs and Power Management circuits embedded in all of QMC's multi-function mobile platforms.
Responsibilities: Skills/Experience: Applicants should have a minimum of 2-3 years of relevant digital and mixed-signal design experience and must have detailed knowledge of RTL design for control and signal processing functions, linting, synthesis, STA, and DFT. Applicants must also have experience with leading-edge ASIC development tools from Synopsys, Mentor, or Cadence. Experience designing mixed signal interfaces and integrating digital modules into mixed-signal ASICs is highly desirable.
Education: Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering
Comments: Manager has requested additional resumes. Manager is also open to candidates at the Engineer IV level/rates. Manager has requested additional resumes.
Available Positions: 1
Posting Title: Hot Req - Process Automation Engineer
Work Location: California - San Diego
Job Family Title: Engineer - Temporary - Engineer II
Skills / Experience: B.S in Computer Science/Computer engineering with at least a couple of years of experience in programming in Excel, Perl, Python or C. Proficiency in Excel programing/VBA, Perl or Python or C. Qlikview skills
Job Description: Automate various HC and project reports that are generated on a weekly basis for the VPs
Responsibilities: Write queries to pull data from multiple internal systems Structure data and create multipe views to ensure data is analzyed and presented appropriately.
Education: Preferred: Master's, Computer Engineering and/or Computer Science Required: Bachelor's Degree
Comments: Manager Feedback: We are looking for experienced DBAs (database analysts) that also have excel and Java or PHP background. Perl, Python will be a plus. Technical skills include: SQL or Oracle database dev, Excel Macro dev, VBA, Perl, Python, PHP. JD 7/17/2014 Manager Feedback: BBA or Econ major with a few years of experience with Excel & MySQL. Ideal candidates will have the following technical skills: SQL dev, Excel Macro dev, VBA, Perl, Python, PHP. Manager has requested additional resumes. This is a software role. It is not a testing role, but an automation role.
Available Positions: 3
Posting Title: Hot Req - PMIC Verification and Integration
Location: California - San Diego
Engineer III
Skills / Experience: * Ability to work with common lab equipment such as power supplies, oscilloscopes, spectrum analyzers, etc. * Significant industry experience in executing bench verification. * Designing and implementing test programs in Visual Basic, C# and QlikView. * Hands on experience with board and device debug. * Experience using IC handlers. * Knowledge in power, mixed-signal, or analog circuit and PCB design. * Ability to communicate clearly, organize effectively and document work thoroughly.
Job Description: QCT's power management team is actively seeking candidates to apply analog, power and mixed signal integrated circuit test and debug expertise to the integration of power management devices into digital wireless phone systems. Circuits of interest are: switching and linear voltage regulators, fuel gauges, precision references, battery chargers and crystal oscillators. Use your software skills (Visual Basic, C#/C/C++, Perl, etc) and hardware test/debug skills to bring new power and mixed signal IC designs into production.
Responsibilities: Modification, execution, debug and report out of PMIC (Power Management IC) automated tests required for fab expansion.
Education: BSEE or equivalent is required
Comments: Please send more resumes. Manager has requested additional resumes. Please ensure that all candidates are confirmed to work in San Diego for this req.
Available Positions: 6
Posting Title: Hot Req - Validation and Emulation Engineer
California - San Diego
Skills / Experience:
We are looking for multiple candidates to perform one or more of the following technical disciplines encompassing these languages and/or methodologies: >> Systems Debug (Emulation, FPGA, SoC Architectures, HW Platforms & firmware, Logic Analyzers, JTAG) >> SoC Content Developer (SoC, C, Assembly, Subsystems: CPU Core, Multimedia, IO, Peripherals, DDR, Wireless, Modem) >> Validation Architect (SoC Architecture/Design/Validation) >> Validation Infrastructure(RTOS, Embedded Systems, Programming, SoC Architectures, Post-Silicon, System, HW/Platform) >> Regression (Test, System & Emulation Platform, Debug, Define Regression flows)
Responsibilities: The ideal candidate will be responsible for one or more of the following: >> Hardware Design and Development for FPGA >> RTL Based Builds for Emulation/Prototyping Platforms >> Develop Validation Content and Content Infrastructure >> Validation Execution: PVT, Regressions, Manuf-System correlation >> System and SOC Debug and Design for Debug
Education: BS in Engineering or CS required.
Comments: Manager has requested additional resumes. The manager is not looking for execution/regression and board design candidates. The manager has additional openings on this req for the following background: CPU ARM A53/A57 validation content and debug. Person should have EE/CS/CE degree with 2+ years of relevant experience. Good C programming skills. Low level Assembly knowledge. Trace32/JTAG experience. San Diego only. Ability to start within next 30 days.
Please continue to submit additional resumes since the team is trying to fill these positions quickly. This is an urgent req. Please send additional candidates ASAP
Available Positions: 6
Posting Title: Hot Req: TEMP POSITION SoC Verification Eng- Raleigh, NC
Work Location: North Carolina
Skills / Experience: Do not apply if you do not have experience in System Verilog and either UVM (preferred) or OVM. 3+ years of experience in ASIC/SoC Verification Additional experience with C and ARM assembly test writing preferred. Must have hands-on experience and strong knowledge in testbench automation, industry standard bug tracking, and regression mechanisms. In-depth knowledge in SoC architecture, including CPUs (preferably ARM), memory subsystems and controllers (PCDDRx), peripherals (PCIe, SATA, Ethernet) , multi-domain clocking, and bus & interconnect structures (preferably as AHB and AXI) Must have excellent system debug skills Excellent oral and written communication skills & ability to work in a team environment
Responsibilities: You will be contributing to the verification effort of a complex chip, sub-system and/or blocks. You will define chip level verification strategies, test planning, and develop all necessary tools and scripts to enable system-level testing in an automated fashion. You will work with the block/core teams to develop re-use verification. You will verify a core or subsystem at the system level for interactions, connectivity, bus certification for robust verification.
Education: Required: Bachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering Preferred: Master's, Computer Engineering and/or Computer Science and/or Electrical Engineering or equivalent experience
Comments: Palladium: Work with perm who owns Palladium simulation Palladium experience preferred. Veloce experience may be acceptable 1. Power Aware 2. Coverage - constrained random, I/O integration, toggle coverage 3. performance: -verification experience on SoC's that contain: CPU, memory, PCI Express -experience with benchmarking software / verification, measurement of latencies and bandwidth
Available position: 3
Location: San Diego, CA
Engineer 1
Engineer I -Multimedia Software Test Engineer
- Experience or Course work with multimedia standards (JPEG, H.264, MPEG, OpenGLES, OpenVG ) or 2G and 3G multimedia applications (Media player, Camera, Browser, DRM, camera, third generation UI interfaces, Bluetooth) is required.
- Experience working with these applications in a wireless environment, including CDMA IS-2000, GSM/GPRS, UMTS or WLAN networks. Experience with those air interfaces and their protocol layers is a big plus.
- Course work with experience in Perl, Python, PHP, Javascript, and MySQL database is preferred, but will consider strong C and C++ candidates.
- Experience with testing and/or software development of Smartphone WinMobile or, Android applications is preferred.
Available Positions: 1
Posting Title: Hot Req - Hardware Design Engineer
Location: California - San Diego
Engineer III
Job Description: We are looking for CWF with experience in any combination of these: - FV (LEC) - GLS (gate level sim) - netlist ECOs - builds, methodology, scripting - synthesis & constraints - digital design using verilog and/or verification of same - timing closure, code linting
Responsibilities:
Education: B.S.EE. required
Comments: Manager would like to see additional resumes. Manager would like to hire 2 temporary employees in this role ASAP. Please submit additional candidates. This is an urgent req.
Available Positions: 1
Posting Title: Hot Req - Verification Engineer
Location: California - San Diego
Engineer III
Skills / Experience: -5+ years of experience in digital and mixed signal circuit design verification - Verification of high-speed parallel/serial IO interfaces such as D-PHY, M-PHY, SATA, Display Port, PCIe, USB2.0, USB3.0, HDMI -Test planning, problem solving, debug, adversarial testing. -Strong working knowledge of HVLs: SystemVerilog, VERA/e-Specman. -Excellent communication and teamwork skills - Extensive block/core level verification experience - SoC verification env setup, driving the tapeout, RTL integration experience is added advantage.
Responsibilities: You will be responsible for developing testplan for functional , develop the scalable testbench using the HVLs, test case development, debugging, coverage model development, coverage closure. You will be working with analog circuit design team, digital design team, analog modeling, characterization team, SoC integration team to complete the successful PHY level verification, integration into SoC, post-silicon validation. SoC verification experience, RTL integration experience is added advantage.
Education: Educational Requirements: BS/MS/PhD in Electrical Engineering or Computer Science
Comments: Please send additional candidates. Urgent Req - Manager has requested additional resumes. Manager has requested candidates with USB3.0, USB2.0 and PCIe2.0 protocol experience.
Available Positions: 1
Posting Title: Hot Req - Analog Behavioral Modeling Engineer
Location: California - San Diego
Skills / Experience: Knowledge and experience of ABM development and its application Strong knowledge of test bench development, excellent simulation debug skills, and working knowledge in mixed-signal/RF testing. Experience with Modelsim, NC-Verilog, VCS or similar digital logic simulators. Experience with Verilog and/or System Verilog Experience with Cadence-AMS or similar AMS mixed-signal simulators.
Responsibilities: Modeling Specification: Review design specifications and interview design and simulation engineers to determine the requirements of the behavioral model. Document requirements and unsupported features and communicate findings. Model Development: Generate and verify ABMs; DAC, ADC, PLL, mixers, amplifiers, voltage regulators, CODECs and RX/TX paths. Model Integration: Work with design and simulation engineers to deliver and debug top-level simulation environments. Revision Control: All ABMs created must conform to revision control requirements.
Education: Required: Bachelor's, Electrical Engineering
Comments: Please submit additional candidates. We have a new opening for this req. ***Please continue to submit resumes.
Available Positions: 1
Posting Title: Hot Req - DRAM Product & Test Engineer
Engineer II Technology Category: Hardware PTE: Test Engineering
Skills / Experience: Candidate must be proficient in developing programs for Advantest memory testers such as the T5585, T5593, T5501, T5503, T5377, etc... for DRAM testing and failure analysis. Candidate should be familiar with DDR1, DDR2, DDR3, DDR4, LPDDR1, LPDDR2, and LPDDR3 protocols and specifications. Position requires a working knowledge of common DRAM failure mechanisms, DRAM failure analysis techniques, board design, signal integrity, and statistical analysis. Software programming skills must include C, C++, ATL, and Perl. Position requires working with several product teams and memory vendors, excellent communication skills is a must.
Job Description: As part of the memory team you will be responsible for verification, characterization, and high volume testing of DRAM devices that are stacked with Qualcomms MDM/MSM/APQs. Time will be divided between developing test programs for new products, supporting high volume production products, failure analysis, and interfacing with our memory vendors. Our goal is to ensure that we ship the highest quality integrated MDM devices.
Responsibilities:
Education: Preferred: MSEE or MSCpE with 3+ yrs experience Minimum: BSEE or BSCpE with 5+ yrs experience
Comments: Manager has requested additional resumes. This is an urgent position.
Available Positions: 4
Posting Title: Hot Req - Product Development Engineer
Work Location: California - San Diego
Job Family Title: Engineer - Temporary - Engineer I
Technology Category: Hardware PTE: Test Engineering
Skills / Experience: B.S.E.E. or M.S.E.E. in Electrical or computer Engineering.
Job Description: Perform bench level testing and characterization on Power Management devices. Write technical reports based on statistical analysis and circuit analysis.
Responsibilities: Product / Test Development Engineer. Responsible for making characterization test measurements on Power Management devices. Knowledge in analog circuits and power management circuits is required. In particular Buck and Boost regulators, LDO's and switch mode power supplies. Additionally, candidate must be familiar with bench instruments like oscilloscopes and other related measurement instruments. Some programming skills may also be required.
Education: Required: Bachelor's, Electrical Engineering, Computer Engineering or equivalent experience Preferred: Master's, Electrical Engineering, Computer Engineering or equivalent experience
Comments: The manager would like resumes with the following: 1. Power electronics 2. Product engineer, Test engineer 3. Power management IC Urgent req. Please submit additional resumes
Available Positions: 1
Posting Title: ASIC Engineer - Design, Synthesis, Low Power
Work Location: California - San Diego
Engineer III Technology Category: Hardware Digital: RTL Design
Skills / Experience: Requirements: - Extensive experience in complete asic flow with low power, performance and area optimization techniques - Synthesis with DCT/DCG or RC/RCP an absolute must. - Place and route tool experience required - Experience with STA using Primetime and PTPX required - Proficient in constraint generation - Formal verification experience (Formality/Conformal) - Perl/Tcl scripting is a preferred - Constraint management tool and Verilog coding experience is a plus - Strong problem solving and asic development/debugging skills
Job Description: We are looking for bright asic engineers with excellent analytical and technical skills. This is an excellent opportunity to be part of a fast paced team responsible for delivering design, flows and methods for high performance SoCs in sub-20nm process for mobile space.
Responsibilities: - Participate on a project involved in the development of Asics, with emphasis in synthesis, timing closure, low power, place and route. - Run synthesis place and route on different cores, create design of experiments and do detailed comparison analysis to improve quality of results. - Work closely with RTL design, physical design, low power and automation teams to create new methods to improve performance and power - Generate, review and validate design constraints to achieve timing closure of complex cores. - Tabulate metrics results for analysis comparison
Education: Preferred: Master's or Doctorate in Computer Engineering and/or Electrical Engineering Bachelors Degree Required
Comments: Manager has requested more resumes.
Available Positions: 1
Posting Title: Design Modeling Engineer
Location: California - San Diego
Engineer III Technology Category: Hardware Digital: RTL Design
Skills / Experience:
Task include:
- Responsible for implementing and supporting C++ and SystemC functional models for the Digital Hardware Team in Qualcomm.
- Micro-architecture and design exploration including HW block re-partitioning, performance analysis and power optimization.
- Code optimization including loop unrolling, pipelining, memory mapping, clocking.
- Optimized RTL generation using High Level Synthesis HLS tools
- Release HW model to the verification team and help them debug any issues
- Work with CAD, IT and development teams to create and improve ESL strategy.
Requirements:
- Minimum of 2 years of working and current experience with SystemC or C++ modeling
- Strong debugging skills
Nice to have experience
- Understanding of digital video standards and video codec protocols
- System C TLM 2.0 experience
- Design and verification environment at SystemC level
- HW/SW co-verification
- HLS tools such as CatapultC, C to S, Synphony, AutoESL, Forte, etc.
- Verilog, system Verilog or vhdl
Responsibilities:
Education: Required: Master's or Doctorate in Computer Engineering and/or Electrical Engineering
Comments: Manager has requested more resumes.
Available Positions: 4
Posting Title: Windows platform Test Automation and Software Test Engineer
Location: California - San Diego
Engineer I Technology Category: Software Test Engineer
Skills / Experience: Good software programming skills C, C#, or Perl. - Experience in MSFT test tools like WTT/WP6/WM7 is a big plus. - Experience in any operating systems platform testing (Microsoft Windows Phone, Google Android, & etc) is a plus. - Must be a good team player and have strong analytical skills. - Previous testing experience will be given a preference.
Job Description: Responsible for test development, execution, troubleshooting and problem resolution on Microsoft Windows Mobile Platform. - Responsible for various modem/Windows Mobile feature integration and test environment set up including creating and executing test scenarios. - Responsible for managing & maintaining h/w & s/w test environment for production test - Actively interact with developers & other test engineers in a team environment.
Responsibilities:
Education: Bachelor's or Master's degree in Electrical/Electronics/ Computer Engineering. Master's degree is preferred. - 3.0 or better GPA
Comments: 4 openings to fill. Need resumes. Please submit reqs asap, this req is HOT. HOT Urgently need resumes, 4 more roles to fill. Please note mgr is looking for candidates with 1 year of exp
Available Positions: 5
Posting Title: (Hot Req) SOC Design Verification Engineer - San Diego
Location: California - San Diego
Engineer III
Job Description: As a Functional Verification Engineer, you will be responsible for understanding the expected functionality of designs, developing corresponding testplans, designing and developing components of our verification environment, and applying these to verify complex designs until coverage goals are achieved in order to ensure the continued commercial success of our high-quality products. These designs are wireless SOCs targeted for high-performance Smartphones and Tablets.
Responsibilities: -Strong critical thinking, problem solving and test planning skills. -Design verification experience (developing test plan, test bench, tests, assertions, functional & code coverage, debugging tests and designs) -General knowledge in ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc. -Familiar with the design, verification and assertion languages: RTL, VHDL, Verilog, System Verilog, System Verilog Assertions (SVA), Vera, e-Specman, etc. -Knowledge of SOC, ARM processor, AMBA bus, DDR, or peripherals is preferred -Scripting and automation skills: Unix/Linux shell programming, Perl, Makefile, revision management (e.g. CVS, ClearCase) is a plus. As verification is a rapidly changing field and consumes the majority of the design process, developing and deploying new verification methodologies is an essential part of the work you will do. Assertions, simulation, formal verification, HW-SW co-verification and constraint/HVL-based verification are all tools in our verification toolbox you will use on a daily basis.
Education: BS Degree Required
Comments: This position is for San Diego only.
Available Positions: 1
Posting Title: Multimedia Digital Designer
Location: California - San Diego
Job Family Title: Engineer - Temporary - Engineer III Technology Category: Hardware Digital: Cores Design
Role Classification: Exempt/Salaried
Background / Credit Check Required: No
Skills / Experience: - Experience designing ASIC IP cores - Profficient with Verilog/VHDL - Tools:NC-SIM/Modeltech/VCS, Verilog/VHDL Linting, Synopsys synthesis, Formal Verification, CDC, Power Artist - Have owned and handled designs ~500K gates. - Excellent communication skills
Job Description: Front-End digital design for Video and Camera IP Cores. Design duties include Linting, CDC, Power Analysis, Synthesis, FV.
Responsibilities:
Education: Master's Preferred, BSEE with equivalent experience required.
Comments: Manager has requested additional resumes.
 | laxman kapardhi Senior Recruitment Executive, Calsoftlabs-An Alten Group Company |
  |
You received this message because you are subscribed to the Google Groups "Jobs for USA consultants (Citizen G.C and H1B)" group.
To unsubscribe from this group and stop receiving emails from it, send an email to jobs-for-usa-consultants-citizen-gc-and-h1b+unsubscribe@googlegroups.com.
To post to this group, send email to jobs-for-usa-consultants-citizen-gc-and-h1b@googlegroups.com.
Visit this group at http://groups.google.com/group/jobs-for-usa-consultants-citizen-gc-and-h1b.
For more options, visit https://groups.google.com/d/optout.
0 comments:
Post a Comment