Hello,
Hope you are doing great.
Please review the requirement and if you find it matching your profile then send me your updated resume ASAP/IMMEDIATE
ASIC/ SoC design flow - Design Automation
Location: Santa Clara, CA
Duration: 6 + months
· EDA Design tools and scripts support
· Front end EDA tools support
· Intel's or Semiconductor company home-grown design environment
· Methodology support
Must Have:
Developing scripts in automating the ASIC or SoC design flow
Familiar with EDA tools of Synopsys, Cadence, Mentor
Methodology or flow development
Regards
Ashish Gupta
1351 McCarthy Boulevard, Suit 116, Milpitas, CA, USA, 95035
Phone : 408-457-9381 Ext 4103
Yahoo, Hangouts : ashish.recruiter12
Email : ashish.gupta@idctechnologies.com
URL : WWW.idctechnologies.com
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